OpenOCD with SWD

Bug

It’s often tricky to know what’s happening inside a microcontroller when everything is not going as planned. This post is about enabling GDB with chips providing the SWD interface, e.g. STM32 chips.

For this you need an SWD dongle. If you are up to some DIY and want it cheap, check the previous post about modifying STM32 Discovery for the purpose.

You can get the patched (thanks Simon Qian!) OpenOCD from our Github repository: https://github.com/snowcap-electronics/OpenOCD-SWD

Fetch, compile and install it to /usr/local/openocd with:

git clone https://github.com/snowcap-electronics/OpenOCD-SWD.git
cd OpenOCD-SWD
./bootstrap
./configure --enable-maintainer-mode  --enable-vsllink --prefix=/usr/local/openocd
make -j4
make install

To program a new software to the F1 Discovery’s F100, connect CN3 pin 1&4 and 2&3. This allows SWD communication from the ST-Link’s F103 to the Discovery’s F100.

Start OpenOCD:

sudo /usr/local/openocd/bin/openocd -f interface/vsllink-swd.cfg -f target/stm32f1x.cfg

You should get something like this:

Open On-Chip Debugger 0.6.0-dev-00247-g1981fa8 (2011-11-20-16:55)
Licensed under GNU GPL v2
For bug reports, read

http://openocd.sourceforge.net/doc/doxygen/bugs.html

Warn : must select a transport.
Info : OpenOCD runs in SWD mode
1000 kHz
adapter_nsrst_delay: 100
jtag_ntrst_delay: 100
cortex_m3 reset_config sysresetreq
Info : Versaloon(0x33)by Simon(compiled on Oct 25 2011)
Info : USB_TO_XXX abilities: 0x00000008:0x00000040:0xC0000006
Info : clock speed 1000 kHz
Info : stm32.cpu: hardware has 6 breakpoints, 4 watchpoints
Error: stm32.cpu -- clearing lockup after double fault
Polling target failed, GDB will be halted. Polling again in 100ms
Polling succeeded again

Then start GDB in another window:

arm-none-eabi-gdb -ex "target remote localhost:3333" firmware.elf

And program it to the F100′s flash:

(gdb) load

For more GDB instructions, check out the GDB and OpenOCD page under http://openocd.sourceforge.net.

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